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"Delay-Time Modeling for ED MOS Logic LSI."

Takeshi Tokuda et al. (1983)

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DOI: 10.1109/TCAD.1983.1270030

access: closed

type: Journal Article

metadata version: 2020-09-24

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Takeshi Tokuda, Kaoru Okazaki, Kazuhiro Sakashita, Isao Ohkura, Tatsuya Enomoto:
Delay-Time Modeling for ED MOS Logic LSI. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(3): 129-134 (1983)

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