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"Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in ..."

Subhendu Roy et al. (2016)

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DOI: 10.1109/TCAD.2015.2481794

access: closed

type: Journal Article

metadata version: 2020-09-24

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Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan:
Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(5): 820-831 (2016)

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