


default search action
"Post-processing of clock trees via wiresizing and buffering for robust design."
Satyamurthy Pullela, Noel Menezes, Lawrence T. Pileggi (1996)
- Satyamurthy Pullela, Noel Menezes, Lawrence T. Pileggi
:
Post-processing of clock trees via wiresizing and buffering for robust design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(6): 691-701 (1996)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.