"An Algorithm to Compact a VLSI Symbolic Layout with Mixed Constraints."

Yuh-Zen Liao, Chak-Kuen Wong (1983)

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DOI: 10.1109/TCAD.1983.1270022

access: closed

type: Journal Article

metadata version: 2020-09-24

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Yuh-Zen Liao, Chak-Kuen Wong:
An Algorithm to Compact a VLSI Symbolic Layout with Mixed Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(2): 62-69 (1983)

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