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"Identifying invalid states for sequential circuit test generation."

Hsing-Chung Liang, Chung-Len Lee, Jwu E. Chen (1997)

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DOI: 10.1109/43.658570

access: closed

type: Journal Article

metadata version: 2023-03-07

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  - https://dblp.org/rec/journals/tcad/LiangLC97
Hsing-Chung Liang, Chung-Len Lee, Jwu E. Chen:
Identifying invalid states for sequential circuit test generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(9): 1025-1033 (1997)

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