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"Time-domain macromodels for VLSI interconnect analysis."

Seok-Yoon Kim, Nanda Gopal, Lawrence T. Pillage (1994)

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DOI: 10.1109/43.317469

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - journals/tcad/KimGP94
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Seok-Yoon Kim, Nanda Gopal, Lawrence T. Pillage:
Time-domain macromodels for VLSI interconnect analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(10): 1257-1270 (1994)

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