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"Comparing layouts with HDL models: a formal verification technique."
Timothy Kam, P. A. Subrahmanyam (1995)
- Timothy Kam, P. A. Subrahmanyam:
Comparing layouts with HDL models: a formal verification technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(4): 503-509 (1995)
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