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"Parity-scan design to reduce the cost of test application."
Hideo Fujiwara, Akihiro Yamamoto (1993)
- Hideo Fujiwara, Akihiro Yamamoto:
Parity-scan design to reduce the cost of test application. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(10): 1604-1611 (1993)
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