"An approach for the formal verification of DSP designs using Theorem proving."

Behzad Akbarpour, Sofiène Tahar (2006)

> Home

Details and statistics

DOI: 10.1109/TCAD.2005.857314

access: closed

type: Journal Article

metadata version: 2020-09-24

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcad/AkbarpourT06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/AkbarpourT06
Behzad Akbarpour, Sofiène Tahar:
An approach for the formal verification of DSP designs using Theorem proving. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(8): 1441-1457 (2006)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.