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"A design of ternary logic circuits using M-NAND and NOT gates."

Akio Odaka, Kunio Satoh (1985)

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DOI: 10.1002/SCJ.4690160608

access: closed

type: Journal Article

metadata version: 2023-09-13

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  - journals/scjapan/OdakaS85
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Akio Odaka, Kunio Satoh:
A design of ternary logic circuits using M-NAND and NOT gates. Syst. Comput. Jpn. 16(6): 68-76 (1985)

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