"Microprocessor architecture utilizing redundant-binary operation."

Takahiro Irita et al. (1999)

> Home

Details and statistics

DOI: 10.1002/(SICI)1520-684X(19991130)30:13<106::AID-SCJ11>3.0.CO;2-4

access: closed

type: Journal Article

metadata version: 2025-03-03

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/scjapan/IritaOFH99
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/scjapan/IritaOFH99
Takahiro Irita, Takayuki Ogura, Minoru Fujishima, Koichiro Hoh:
Microprocessor architecture utilizing redundant-binary operation. Syst. Comput. Jpn. 30(13): 106-115 (1999)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.