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"How to avoid the generation of logic loops in the construction of fault trees."

Micaela Demichela et al. (2004)

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DOI: 10.1016/S0951-8320(03)00141-8

access: closed

type: Journal Article

metadata version: 2020-02-25

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  dblp key:
  - journals/ress/DemichelaPCC04
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  - https://dblp.org/rec/journals/ress/DemichelaPCC04
Micaela Demichela, Norberto Piccinini, Italo Ciarambino, Sergio Contini:
How to avoid the generation of logic loops in the construction of fault trees. Reliab. Eng. Syst. Saf. 84(2): 197-207 (2004)

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