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"Memory cell and technology issues for 64- and 256-Mbit one-transistor cell ..."
A. F. Tasch Jr., Laureen H. Parker (1989)
- A. F. Tasch Jr., Laureen H. Parker:
Memory cell and technology issues for 64- and 256-Mbit one-transistor cell MOSD DRAMs. Proc. IEEE 77(3): 374-388 (1989)
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