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"Estimating the SEU failure rate of designs implemented in FPGAs in ..."

Igor Villalta et al. (2017)

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DOI: 10.1016/J.MICROREL.2017.08.003

access: closed

type: Journal Article

metadata version: 2022-10-02

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Igor Villalta, Unai Bidarte, Julen Gomez-Cornejo, Jesús Lázaro, Armando Astarloa:
Estimating the SEU failure rate of designs implemented in FPGAs in presence of MCUs. Microelectron. Reliab. 78: 85-92 (2017)

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