Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Impact of gate stack process on conduction and reliability of 0.18 mum ..."

G. Ghidini et al. (2003)

> Home

Details and statistics

DOI: 10.1016/S0026-2714(03)00175-6

access: closed

type: Journal Article

metadata version: 2022-10-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/mr/GhidiniGGGBPSCI03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/mr/GhidiniGGGBPSCI03
G. Ghidini, A. Garavaglia, G. Giusto, Andrea Ghetti, R. Bottini, D. Peschiaroli, M. Scaravaggi, F. Cazzaniga, Daniele Ielmini:
Impact of gate stack process on conduction and reliability of 0.18 mum PMOSFET. Microelectron. Reliab. 43(8): 1221-1227 (2003)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.