"On area-efficient drawings of rectangular duals for VLSI floor-plan."

Katsunori Tani et al. (1991)

> Home

Details and statistics

DOI: 10.1007/BF01582878

access: closed

type: Journal Article

metadata version: 2017-05-27

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/mp/TaniTSS91
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/mp/TaniTSS91
Katsunori Tani, Shuji Tsukiyama, Shoji Shinoda, Isao Shirakawa:
On area-efficient drawings of rectangular duals for VLSI floor-plan. Math. Program. 52: 29-43 (1991)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.