default search action
"A low power 16-bit 50 MS/s pipeline ADC with 104 dB SFDR in 0.18 μm CMOS."
Xiaodan Zhou et al. (2024)
- Xiaodan Zhou, Weipeng He, Dongbing Fu, Jianan Wang, Guangbing Chen, Qiang Li:
A low power 16-bit 50 MS/s pipeline ADC with 104 dB SFDR in 0.18 μm CMOS. Microelectron. J. 146: 106144 (2024)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.