


default search action
"Design and simulation of an innovative CMOS ternary 3 to 1 multiplexer and ..."
Mohd Ziauddin Jahangir, J. Mounika (2019)
- Mohd Ziauddin Jahangir
, J. Mounika:
Design and simulation of an innovative CMOS ternary 3 to 1 multiplexer and the design of ternary half adder using ternary 3 to 1 multiplexer. Microelectron. J. 90: 82-87 (2019)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.