"An analog processor architecture for a neural network classifier."

Michel Verleysen et al. (1994)

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DOI: 10.1109/40.285221

access: closed

type: Journal Article

metadata version: 2022-06-23

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  persistent URL:
  - https://dblp.org/rec/journals/micro/VerleysenTVM94
Michel Verleysen, Philippe Thissen, Jean-Luc Voz, Jordi Madrenas:
An analog processor architecture for a neural network classifier. IEEE Micro 14(3): 16-28 (1994)

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