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ORCID"The cache DRAM architecture: a DRAM with an on-chip cache memory."
Hideto Hidaka et al. (1990)
- Hideto Hidaka, Yoshio Matsuda, Mikio Asakura, Kazuyasu Fujishima:
The cache DRAM architecture: a DRAM with an on-chip cache memory. IEEE Micro 10(2): 14-25 (1990)
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