"High speed and efficient area optimal ate pairing processor implementation ..."

Anissa Sghaier et al. (2018)

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DOI: 10.1016/J.MICPRO.2018.06.001

access: closed

type: Journal Article

metadata version: 2025-01-19

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Anissa Sghaier, Zeghid Medien, Loubna Ghammam, Sylvain Duquesne, Mohsen Machhout, Hassan Yousif Ahmed:
High speed and efficient area optimal ate pairing processor implementation over BN and BLS12 curves on FPGA. Microprocess. Microsystems 61: 227-241 (2018)

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