"Retraction notice to "FPGA implementation of low power and high speed ..."

> Home

Details and statistics

DOI: 10.1016/J.MICPRO.2024.105024

access: closed

type: Journal Article

metadata version: 2024-06-13

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/mam/MenakaJD24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/mam/MenakaJD24
Retraction notice to "FPGA implementation of low power and high speed image edge detection algorithm" [Microprocessors and Microsystems 75, 2020, 103053]. Microprocess. Microsystems 105: 105024 (2024)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.