"A 28-nm 16-kb Aggregation and Combination Computing-in-Memory Macro With ..."

Zhaoyang Zhang et al. (2025)

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DOI: 10.1109/JSSC.2024.3472115

access: closed

type: Journal Article

metadata version: 2025-04-08

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Zhaoyang Zhang, Yanqi Zhang, Feiran Liu, Zhichao Liu, Yinhai Gao, Yuchen Ma, Yutong Zhang, An Guo, Tianzhu Xiong, Jinwu Chen, Xi Chen, Bo Wang, Yuchen Tang, Jun Yang, Xin Si:
A 28-nm 16-kb Aggregation and Combination Computing-in-Memory Macro With Dual-Level Sparsity Modulation and Sparse-Tracking ADCs for GCNs. IEEE J. Solid State Circuits 60(3): 949-962 (2025)

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