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"A Real-Time Image-Feature-Extraction and Vector-Generation VLSI Employing ..."
Hideo Yamasaki, Tadashi Shibata (2007)
- Hideo Yamasaki, Tadashi Shibata:
A Real-Time Image-Feature-Extraction and Vector-Generation VLSI Employing Arrayed-Shift-Register Architecture. IEEE J. Solid State Circuits 42(9): 2046-2053 (2007)
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