"An 800 MS/s Dual-Residue Pipeline ADC in 40 nm CMOS."

Davide Vecchi et al. (2011)

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DOI: 10.1109/JSSC.2011.2164301

access: closed

type: Journal Article

metadata version: 2020-08-30

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Davide Vecchi, Jan Mulder, Frank M. L. van der Goes, Jan R. Westra, Emre Ayranci, Christopher M. Ward, Jiansong Wan, Klaas Bult:
An 800 MS/s Dual-Residue Pipeline ADC in 40 nm CMOS. IEEE J. Solid State Circuits 46(12): 2834-2844 (2011)

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