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ORCID"A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing ..."
Enrico Temporiti et al. (2009)
- Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Riccardo Tonietto, Francesco Svelto:
A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques. IEEE J. Solid State Circuits 44(3): 824-834 (2009)
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