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"A microprocessor with a 128-bit CPU, ten floating-point MAC's, four ..."

Masakazu Suzuoki et al. (1999)

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DOI: 10.1109/4.799870

access: closed

type: Journal Article

metadata version: 2022-08-16

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Masakazu Suzuoki, Ken Kutaragi, Toshiyuki Hiroi, Hidetaka Magoshi, Shin'ichi Okamoto, Masaaki Oka, Akio Ohba, Yasuyuki Yamamoto, Makoto Furuhashi, Masayoshi Tanaka, Teiji Yutaka, Toyoshi Okada, Masato Nagamatsu, Yukihiro Urakawa, Masami Funyu, Atsushi Kunimatsu, Harutaka Goto, Kazuhiro Hashimoto, Nobuhiro Ide, Hiroaki Murakami, Yukio Ohtaguro, Akira Aono:
A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder. IEEE J. Solid State Circuits 34(11): 1608-1618 (1999)

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