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"A 9-bit 500-MS/s 2-bit/cycle SAR ADC With Error-Tolerant Interpolation ..."

Jaegeun Song et al. (2022)

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DOI: 10.1109/JSSC.2021.3111924

access: closed

type: Journal Article

metadata version: 2022-05-18

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Jaegeun Song, Yunsoo Park, Chaegang Lim, Yohan Choi, Soonsung Ahn, Sooho Park, Chulwoo Kim:
A 9-bit 500-MS/s 2-bit/cycle SAR ADC With Error-Tolerant Interpolation Technique. IEEE J. Solid State Circuits 57(5): 1492-1503 (2022)

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