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"A 200 MHz register-based wave-pipelined 64 M synchronous DRAM."
Ho-Jun Song et al. (1997)
- Ho-Jun Song, Jung-Pill Kim, Jae-Jin Lee, Jong-Hoon Oh, Seung-Han Ahn, Inseok Hwang:
A 200 MHz register-based wave-pipelined 64 M synchronous DRAM. IEEE J. Solid State Circuits 32(1): 92-99 (1997)
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