"Design and implementation of an embedded 512-KB level-2 cache subsystem."

Jinuk Luke Shin et al. (2005)

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DOI: 10.1109/JSSC.2005.852165

access: closed

type: Journal Article

metadata version: 2022-03-02

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Jinuk Luke Shin, Bruce Petrick, Mandeep Singh, Ana Sonia Leon:
Design and implementation of an embedded 512-KB level-2 cache subsystem. IEEE J. Solid State Circuits 40(9): 1815-1820 (2005)

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