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"A 7.1-GB/s low-power rendering engine in 2-D array-embedded memory logic ..."

Yong-Ha Park et al. (2001)

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DOI: 10.1109/4.924857

access: closed

type: Journal Article

metadata version: 2022-04-04

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Yong-Ha Park, Seon-Ho Han, Jung-Hwan Lee, Hoi-Jun Yoo:
A 7.1-GB/s low-power rendering engine in 2-D array-embedded memory logic CMOS for portable multimedia system. IEEE J. Solid State Circuits 36(6): 944-955 (2001)

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