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"A sub-2.0 V BiCMOS logic circuit with a BiCMOS charge pump."

Hitoshi Okamura et al. (1996)

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DOI: 10.1109/4.485869

access: closed

type: Journal Article

metadata version: 2022-07-18

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  - journals/jssc/OkamuraATTIKY96
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  - https://dblp.org/rec/journals/jssc/OkamuraATTIKY96
Hitoshi Okamura, Takao Atsumo, Koichi Takeda, Masahide Takada, Kiyotaka Imai, Yasushi Kinoshita, Tom Yamazaki:
A sub-2.0 V BiCMOS logic circuit with a BiCMOS charge pump. IEEE J. Solid State Circuits 31(1): 84-90 (1996)

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