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"A 1.6 Gbyte/s data transfer rate 8 Mb embedded DRAM."

Shinji Miyano et al. (1995)

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DOI: 10.1109/4.475717

access: closed

type: Journal Article

metadata version: 2023-05-03

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  dblp key:
  - journals/jssc/MiyanoNSYWHESKIOKYSKYSFHHNNR95
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  persistent URL:
  - https://dblp.org/rec/journals/jssc/MiyanoNSYWHESKIOKYSKYSFHHNNR95
Shinji Miyano, Kenji Numata, Katsuhiko Sato, Tomoaki Yabe, Masaharu Wada, Ryo Haga, Motohiro Enkaku, Masazumi Shiochi, Yutaka Kawashima, Masayuki Iwase, Masahisa Ohgata, Junpei Kumagai, Takeshi Yoshida, Masaomi Sakurai, Seiji Kaki, Narutoshi Yanagiya, Hiroshi Shinya, Tohm Fumyama, Paul Hansen, Marc Hannah, Michael Nagy, Anan Nagarajan, Mana Rungsea:
A 1.6 Gbyte/s data transfer rate 8 Mb embedded DRAM. IEEE J. Solid State Circuits 30(11): 1281-1285 (1995)

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