"Highly Energy-Efficient SRAM With Hierarchical Bit Line Charge-Sharing ..."

Shinji Miyano et al. (2013)

> Home

Details and statistics

DOI: 10.1109/JSSC.2012.2237572

access: closed

type: Journal Article

metadata version: 2020-08-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/MiyanoMYKSSS13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/MiyanoMYKSSS13
Shinji Miyano, Shinichi Moriwaki, Yasue Yamamoto, Atsushi Kawasumi, Toshikazu Suzuki, Takayasu Sakurai, Hirofumi Shinohara:
Highly Energy-Efficient SRAM With Hierarchical Bit Line Charge-Sharing Method Using Non-Selected Bit Line Charges. IEEE J. Solid State Circuits 48(4): 924-931 (2013)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.