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"Sub-500-ps 64-b ALUs in 0.18-μm SOI/bulk CMOS: design and scaling trends."

Sanu K. Mathew et al. (2001)

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DOI: 10.1109/4.962283

access: closed

type: Journal Article

metadata version: 2022-04-06

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Sanu K. Mathew, Ram K. Krishnamurthy, Mark A. Anders, Rafael Rios, Kaizad R. Mistry, Krishnamurthy Soumyanath:
Sub-500-ps 64-b ALUs in 0.18-μm SOI/bulk CMOS: design and scaling trends. IEEE J. Solid State Circuits 36(11): 1636-1646 (2001)

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