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"A 1-V 128-kb four-way set-associative CMOS cache memory using ..."

Perng-Fei Lin, James B. Kuo (2001)

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DOI: 10.1109/4.913745

access: closed

type: Journal Article

metadata version: 2022-04-04

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Perng-Fei Lin, James B. Kuo:
A 1-V 128-kb four-way set-associative CMOS cache memory using wordline-oriented tag-compare (WLOTC) structure with the content-addressable-memory (CAM) 10-transistor tag cell. IEEE J. Solid State Circuits 36(4): 666-675 (2001)

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