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"Design of a low-power 10 Gb/s Si bipolar 1: 16-demultiplexer IC."

Zhihao Lao, Ulrich Langmann (1996)

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DOI: 10.1109/4.485875

access: closed

type: Journal Article

metadata version: 2022-07-18

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  dblp key:
  - journals/jssc/LaoL96
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  - https://dblp.org/rec/journals/jssc/LaoL96
Zhihao Lao, Ulrich Langmann:
Design of a low-power 10 Gb/s Si bipolar 1: 16-demultiplexer IC. IEEE J. Solid State Circuits 31(1): 128-131 (1996)

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