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"40-Gb/s 2: 1 multiplexer and 1: 2 demultiplexer in 120-nm standard CMOS."

Daniel Kehrer et al. (2003)

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DOI: 10.1109/JSSC.2003.818297

access: closed

type: Journal Article

metadata version: 2022-04-20

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Daniel Kehrer, Hans-Dieter Wohlmuth, Herbert Knapp, Martin Wurzer, Arpad L. Scholtz:
40-Gb/s 2: 1 multiplexer and 1: 2 demultiplexer in 120-nm standard CMOS. IEEE J. Solid State Circuits 38(11): 1830-1837 (2003)

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