"A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With ..."

Eric Karl et al. (2013)

> Home

Details and statistics

DOI: 10.1109/JSSC.2012.2213513

access: closed

type: Journal Article

metadata version: 2024-04-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/KarlWNGHMKBZMB13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/KarlWNGHMKBZMB13
Eric Karl, Yih Wang, Yong-Gee Ng, Zheng Guo, Fatih Hamzaoglu, Mesut Meterelliyoz, John Keane, Uddalak Bhattacharya, Kevin Zhang, Kaizad Mistry, Mark Bohr:
A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry. IEEE J. Solid State Circuits 48(1): 150-158 (2013)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.