BibTeX record journals/jssc/ItohNMNYH01

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@article{DBLP:journals/jssc/ItohNMNYH01,
  author    = {Niichi Itoh and
               Yuka Naemura and
               Hiroshi Makino and
               Yasunobu Nakase and
               Tsutomu Yoshihara and
               Yasutaka Horiba},
  title     = {A 600-MHz 54{\texttimes}54-bit multiplier with rectangular-styled
               Wallace tree},
  journal   = {{IEEE} J. Solid State Circuits},
  volume    = {36},
  number    = {2},
  pages     = {249--257},
  year      = {2001},
  url       = {https://doi.org/10.1109/4.902765},
  doi       = {10.1109/4.902765},
  timestamp = {Wed, 06 Apr 2022 19:16:53 +0200},
  biburl    = {https://dblp.org/rec/journals/jssc/ItohNMNYH01.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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