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"Loop-based interconnect modeling and optimization approach for ..."
Xuejue Huang et al. (2003)
- Xuejue Huang, Phillip J. Restle, Thomas J. Bucelot, Yu Cao, Tsu-Jae King, Chenming Hu:
Loop-based interconnect modeling and optimization approach for multigigahertz clock network design. IEEE J. Solid State Circuits 38(3): 457-463 (2003)
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