Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"An 82-107.6-GHz Integer-N ADPLL Employing a DCO With Split Transformer and ..."

Zhiqiang Huang, Howard C. Luong (2019)

> Home

Details and statistics

DOI: 10.1109/JSSC.2018.2876462

access: closed

type: Journal Article

metadata version: 2020-08-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/HuangL19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/HuangL19
Zhiqiang Huang, Howard C. Luong:
An 82-107.6-GHz Integer-N ADPLL Employing a DCO With Split Transformer and Dual-Path Switched-Capacitor Ladder and a Clock-Skew-Sampling Delta-Sigma TDC. IEEE J. Solid State Circuits 54(2): 358-367 (2019)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.