Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"2-V/100-ns 1T/1C nonvolatile ferroelectric memory architecture with ..."

Hiroshige Hirano et al. (1997)

> Home

Details and statistics

DOI: 10.1109/4.568826

access: closed

type: Journal Article

metadata version: 2022-07-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/HiranoHMNINCS97
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/HiranoHMNINCS97
Hiroshige Hirano, Toshiyuki Honda, Nobuyuki Moriwaki, Tetsuji Nakakuma, Atsuo Inoue, George Nakane, Shigeo Chaya, Tatsumi Sumi:
2-V/100-ns 1T/1C nonvolatile ferroelectric memory architecture with bitline-driven read scheme and nonrelaxation reference cell. IEEE J. Solid State Circuits 32(5): 649-654 (1997)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.