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"500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC."

Brian P. Ginsburg, Anantha P. Chandrakasan (2007)

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DOI: 10.1109/JSSC.2007.892169

access: closed

type: Journal Article

metadata version: 2022-04-09

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Brian P. Ginsburg, Anantha P. Chandrakasan:
500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC. IEEE J. Solid State Circuits 42(4): 739-747 (2007)

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