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"Low-Spur, Low-Phase-Noise Clock Multiplier Based on a Combination of PLL ..."
Sander L. J. Gierkink (2008)
- Sander L. J. Gierkink:
Low-Spur, Low-Phase-Noise Clock Multiplier Based on a Combination of PLL and Recirculating DLL With Dual-Pulse Ring Oscillator and Self-Correcting Charge Pump. IEEE J. Solid State Circuits 43(12): 2967-2976 (2008)
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