"8-ns CMOS 64 K4 and 256 K1 SRAMs."

Stephen T. Flannagan et al. (1990)

> Home

Details and statistics

DOI: 10.1109/4.62123

access: closed

type: Journal Article

metadata version: 2025-01-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/FlannaganPHEFNEDDK90
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/FlannaganPHEFNEDDK90
Stephen T. Flannagan, Perry H. Pelley, Norman Herr, Bruce E. Engles, Taisheng Feng, Scott G. Nogle, John W. Eagan, Robert J. Dunnigan, Lawrence J. Day, Roger I. Kung:
8-ns CMOS 64 K*4 and 256 K*1 SRAMs. IEEE J. Solid State Circuits 25(5): 1047-1056 (1990)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.