"A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With ..."

Yoshiyasu Doi et al. (2013)

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DOI: 10.1109/JSSC.2013.2278805

access: closed

type: Journal Article

metadata version: 2020-08-30

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Yoshiyasu Doi, Takayuki Shibasaki, Takumi Danjo, Win Chaivipas, Takushi Hashida, Hiroki Miyaoka, Masanori Hoshino, Yoichi Koyanagi, Takuji Yamamoto, Sanroku Tsukamoto, Hirotaka Tamura:
A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process. IEEE J. Solid State Circuits 48(12): 3258-3267 (2013)

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