Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"A 40-170 MHz PLL-Based PWM Driver Using 2-/3-/5-Level Class-D PA in 130 nm ..."

Kunhee Cho, Ranjit Gharpurey (2016)

> Home

Details and statistics

DOI: 10.1109/JSSC.2016.2601600

access: closed

type: Journal Article

metadata version: 2020-08-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/ChoG16a
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/ChoG16a
Kunhee Cho, Ranjit Gharpurey:
A 40-170 MHz PLL-Based PWM Driver Using 2-/3-/5-Level Class-D PA in 130 nm CMOS. IEEE J. Solid State Circuits 51(11): 2639-2650 (2016)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.