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"High-Speed Time Division Switch for 32-Mbit/s Bearer Rate Signals."

Naoaki Yamanaka, Hiroshi Miyanaga, Yousuke Yamamoto (1987)

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DOI: 10.1109/JSAC.1987.1146648

access: closed

type: Journal Article

metadata version: 2020-04-02

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  - journals/jsac/YamanakaMY87
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  - https://dblp.org/rec/journals/jsac/YamanakaMY87
Naoaki Yamanaka, Hiroshi Miyanaga, Yousuke Yamamoto:
High-Speed Time Division Switch for 32-Mbit/s Bearer Rate Signals. IEEE J. Sel. Areas Commun. 5(8): 1249-1255 (1987)

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