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"Transforming logic simulator output to tester timing descriptions."

Peter Spanier, Hans Wojtkowiak, Karl B. Eisner (1990)

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DOI: 10.1016/0165-6074(90)90190-K

access: closed

type: Journal Article

metadata version: 2022-08-12

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Peter Spanier, Hans Wojtkowiak, Karl B. Eisner:
Transforming logic simulator output to tester timing descriptions. Microprocessing and Microprogramming 28(1-5): 291-294 (1990)

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